Re: Questions on Berkeley UPC network support

Date: Fri Dec 02 2005 - 16:11:16 PST

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    On Fri, Dec 02, 2005 at 03:42:31PM -0800, Jonathan Day wrote:
    > Hi,
    > A quick question - are there any plans to add support for any of the 
    > following to Berkeley's UPC? (I'm listing them in order of priority of 
    > interest to the development group I'm working with)
    Here's some quick answers--others in my group will I'm sure correct me
    if I'm wrong on any particulars.
    > OpenIB Infiniband
    If this uses the same interface as Mellanox's VAPI for Infiniband, then
    we should already work.  
    > OpenMOSIX (with or without Distributed Shared Memory)
    No plan to devote time to supporting OpenMOSIX per se--but if it exposes
    a regular network interface (TCP/IP or whatever), then we ought to work
    > MPI 2 (in particular the OpenMPI implementation)
    Since MPI 2 is a superset of MPI 1.1, we should work on any MPI 2
    compliant system.  We should also be able to interoperate with MPI (i.e.
    an application could use both MPI and UPC within the same program),
    provided that the new MPI 2 'spawn' capability is not used (UPC in
    general, and our implementation in particular, has a number of
    constructs that make it hard to support dynamically changing the number
    of threads/processes in a job).
    > HyperTransport
    Unless I'm missing something, HyperTransport exposes a regular memory
    address as its interface (i.e. it looks like a big SMP) and thus we'd
    work fine on it.  
    > Bulk Synchronous Protocol (again, I'm mostly interested in the TUB 
    > implementation)
    You got me--I've never heard of Bulk Synchronous Protocol.  But it
    doesn't sound very fine-grained, and since UPC does best with networks
    that support well-performing fine-grained communication--and which
    support both asynchronous as well as synchronous communication--it
    doesn't sound like an ideal candidate.  
    > Also, for architectures, would there be any interested in supporting
    > the MIPS64 processor? We're going to be using the (somewhat saner!)
    > AMD Opteron, which I believe Berkeley's UPC software already supports,
    > but we're also using the Broadcom 1250 (a.k.a. SiByte SB1) which is a
    > dual-core processor based on the 64-bit MIPS specification.
    Our implementation translates UPC into C (with library calls for
    networking), so theoretically, any system with a working C compiler is
    fair game.  We often run into various compiler-specific hiccups, and/or
    find that we can implement some hand-written assembly to optimize for a
    particular chip.  We're generally interested in our support being as
    wide as possible, so if there's a chip and/or compiler we don't yet
    support and you want us to, we'll add it if we can get an account on a
    system to test with.
    Hope that helps.
    Jason Duell             Future Technologies Group
    <jcduell_at_lbl_dot_gov>       Computational Research Division
    Tel: +1-510-495-2354    Lawrence Berkeley National Laboratory

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