From: Paul H. Hargrove (PHHargrove_at_lbl_dot_gov)
Date: Thu Jun 26 2008 - 15:46:56 PDT
George Caragea wrote: > Hello, > We are trying to port UPC/GASNet to a new platform, and are currently > looking at providing the operations in gasnet/gasnet_atomic_bits.h. I > read the draft HOWTO posted at > http://upc-bugs.lbl.gov/bugzilla/show_bug.cgi?id=1607, which was very > helpful. > > However, it seems our platform falls into under the 5c bullet of that > classification, namely we have an atomic test-and-set operation. The > suggestion in that document is that a variation of the load-and-clear > algorithm could be used in this case, but at a quick search I didn't > find any references to such an algorithm. If anyone can provide any > further references or guidance on this matter, it would be really > helpful. > > Thanks, > George > The "load-and-clear" is case 5b (PARISC, SPARCv7 and SPARCv8). They use the most siginicant bit of a word as a spinlock. With test-and-set you have the same basic algorithm, but with the boolean sense of the lock inverted. For the actual code, see if "#elif PLATFORM_ARCH_PARISC" code in gasnet_atomic_bits.h -Paul -- Paul H. Hargrove PHHargrove_at_lbl_dot_gov Future Technologies Group HPC Research Department Tel: +1-510-495-2352 Lawrence Berkeley National Laboratory Fax: +1-510-486-6900